Voltage Optimization Modules IP Core
* TMFLT-S IP (Timing Fault Sensor)
Estimates the Fmax/Vmin of the circuit throughout a calibration stage
* TMFLT-R IP (Timing Fault Ring) :
Tracks either the minimal voltage procedure (Vmin) or the optimum clock regularity (Fmax) throughout run-time stage
* TMFLT Sensor application technique:
Allows picking the most effective register prospects to put TMFLT Sensors. Allowing to reduce the location expenses to much less than 2%.